Field of the Invention
Various embodiments of the present invention relate to a power saving control method for a memory.
Description of the Related Art
A memory module in which a low power consumption mode can be set and cancelled by a control signal has been proposed (see Japanese Patent Laid-Open No. 2013-25843). This memory module includes an input node where a control signal called a resume standby signal (hereinafter, will be referred to as an RS signal) is input, and a state of the memory module is shifted to a resume state or shifted to a standby state in accordance with the RS signal.
In addition, according to Japanese Patent Laid-Open No. 2013-25843, the control signals are input to a plurality of memory modules belonging to the same memory block in a parallel manner to propagate in paths within the modules, and part of the memory modules outputs the control signals to paths outside the downstream modules. As a result, generation of a rush current is mitigated when the low power consumption mode in the plurality of memory modules is cancelled.